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sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 2 of 17 conte nt 1. general description -- -- ---------------------------------------------------------------------- 3 2. maximum absolute limit ---------------------------------- -- --------------------------------- 3 3. mechanical characteristics -------- --- ------------- ------------------------------------------ 3 a) physical data b) external dimensions 4. electrical characteristics ---------------------------- --- -------------------------------------- 4 a) dc characteristics b) ac characteristics c) el backlight d) led back light 5 . operating principles --------------------------------------------------------------- -- --------- 7 a) pin description b) block diagram c) instruction description 6. operating methods ----------------------------------------------------------------- ---- -- ---- 13 a) interface with mpu b) power supply c) operating example
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 3 of 17 1. general description sc162 b , a dot - matrix character lcd module, design for displaying 2 line 16 row character s. c haracter font is 5x7 dots with cursor . the sc162 b provid es two types of interfaces to mpu: 4 - bit and 8 - bit interfaces. sc162 b can includes el or led backlight for custom design. t he custom can design for color of el or led backlight, viewing angle and lcd type. 2. maximum absolute limit characteristics symbol r atings remark operating voltage v dd - 0.3v to +7.0v driver supply voltage v lcd vdd - 12v to vdd + 0.3v input voltage range v in - 0.3v to vdd + 0.3v t a 1 - 10c to+60c normal temperature lcm operating temperature t a2 - 20c to+60c wide temperature lcm storage temperature t sto - 25 c to+ 70 c note: stresses beyond those given in the absolute maximum rating table may cause operational errors or damage to the device. 3. mechanical characteristics a) physical data item s tandard value u nit remark n umber of character s 162 m odule size 122.044.014.0 mm v iewing area 99.024.0 mm a ctive area 94.820.0 mm character size 9.664.84 mm character pith 10.346.0 mm a pprox. weight g d rive method 1/5bias 1/16 duty b) external dimensions 122.00 115.00 106.00 99.00 94.80 pitch2.54x15=38.10 9.66 1.10 35.50 24.00 20.00 0.06 44.00 37.00 0.68 0.50 7.48 8.00 12.00 13.50 3.50 r0.5 5.00 r1.75 4pl 2.50 r0.50 16pl 1 14.00 9.00 14.00 1.60 1.16 4.84 0.98 0.92
sc162 b ver2.1 digitron electronic technology co., ltd page 4 of 17 4. electrical characteristics a) dc characteristics a.1) dc characteristics ( ta =25 c, vdd = 2.7 to 4.5v) limit characteristics symbol min. typ. max. unit test condition input high voltage v im 0.7vdd - vdd v input low v oltage v ll - 0.3 0.55 v input high current i ih - 1.0 1.0 u a input low current i ll - 5.0 - 15 - 30 u a vdd = 3.0v output high voltage v oh 0.75vdd - - v ioh = - 0.1ma pins: db7 - 0 output low voltage v ol - - 0.2vdd v | ol = 0.1ma pins: db7 - 0 lcd voltage v lcd v operating current i dd ma note: vdd = 3v a.2) dc characteristics ( ta = 25c, vdd = 4.5 to 5.5v) limit characteristics symbol min. typ. max. unit test condition input high voltage v im 2.2 vdd v input low voltage v ll - 0.3 0.6 v in put high current i ih - 2.0 2.0 u a input low current i ll - 20 - 50 - 100 u a vdd = 5 .0v output high voltage v oh 2.4 - vdd v i oh = - 0.1ma pins: db7 - 0 output low voltage v ol - - 0.4 v i ol = 0.1ma pins: db7 - 0 lcd voltage v lcd 5 v operating current i dd 1.0 ma note: vdd = 5v b) ac characteristics b.1) ac characteristics ( ta = 25c, vdd = 2.7 to 4.5v) write mode (writing data from mpu to lcd module ) limit characteristics symbol min. typ. max. unit test condition e cycle time tc 1000 ns pine e p ulse width tpw 450 - - ns pine e rise/fall time tr,tf - - 25 ns pine address setup time tsp - i 60 ns pins: rs, r/w, e address hold time thd1 20 ns pins: rs, r/w, e data setup time tsp2 195 ns pins: db7 - 0 data hold time thd2 10 - - ns pins: db7 - 0 read mode (reading data from lcd module to mpu) limit characteristics symbol min. typ. max. unit test condition e cycle time tc 1000 ns pine e pulse width tw 450 ns pine e rise/fall time tr,tf 25 ns pine address setup time tsp - i 60 ns pins: rs, r/w,e address hold time thd1 20 ns pins: rs, r/w,e data output delay time td 360 ns pins: db7 - 0 data hold time thd2 5.0 - - ns pin db7 - 0
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 5 of 17 b.2) ac characteristics (ta = 25c, vdd = 4.5 to 5.5v) write mode (writing data from mpu to lcd module) limit characteristics symbol min. typ. max. unit test condition e cycle time tc 400 ns pine e pulse width tpw 150 - - ns pine e rise/fall time tr,tf - - 25 ns pine address setup time tsp - i 30 ns pi ns: rs, r/w, e address hold time thd1 10 ns pins: rs, r/w, e data setup time tsp2 40 ns pins: db7 - 0 data hold time thd2 10 - - ns pins: db7 - 0 read mode (reading data from lcd module to mpu) limit characteristics symbol min. typ. max. unit test co ndition e cycle time tc 400 ns pin e e pulse width tw 150 ns pin e e rise/fall time tr,tf 25 ns pin e address setup time tsp - i 30 ns pins: rs, r/w,e address hold time thd1 10 ns pins: rs, r/w,e data output delay time td 100 ns pins: db7 - 0 data hold time thd2 20 - - ns pin db7 - 0 c) el backlight el ,cold cathode fluorescent lamp and led etc, are available as backlight for lcd module upon your choice ,your request. 1.el ? 1 ? feat ures max 1.3mm thickness (max 1.5mm for lead portion). wide driving condition of 60 - 1000hz and 150v ac max .with inverter , step - up voltage from 1.5v battery is available. emitted colors are blue - green and white . operating characteristics ? 2 ? electrical c haracteristics life characteristics voltage vs. brightness voltage vs. current density d ) led backlight (1) features low voltage driving (dc) is available without inverter. 0 50 100 150 200 50 100 150 50hz 400hz 1khz voltage (vrms) brightness current density (ma/cm ) 04 voltage (vrms) 100 50 0 02 150 50hz 06 08 400hz 1khz 10 2 power consumption (mw/cm ) 2 initial brightness ration ( %) time (h) 0 100 100 200 300 400 500 50 100v/400hz 100v/700hz 100v/50hz ambient condition: 50 c 90 % rh constant voltage /frequency drive inverter drive current density power consumption
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 6 of 17 long life time 100000 hours (average). no noise occ urrence. various color of yellow - green and amber etc. operating characteristics (2) electrical characteristics (reference data) forward current derating curve wave length vs. relative light intensity 100% forward current (if) 20% - 20 25 70 ?? note : the above spec . are only for reference timing characterisics db0~db7 r/w rs tr th1 tsu2 tc valid data th2 tw tf th1 e tsu1 write timing tsu e db0~db7 r/w rs tr th tc valid data td tdh tw tf th read timing 100 50 0 520 540 560 580 600 620 640 660 680 700 l: yellow - green a: amber a l relative light intensity ( (%) wave length (mm)
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 7 of 17 5. operating principles a) pin description pin no. symbol level function 1 v ss 0v ground 2 v dd 2.7v~5.5v supply voltage for logic 3 v 0 variable voltage for lcd 4 rs h/l h: instruction code l: data 5 r/w h/l h: read signal l: write signal 6 e h ? l enable signal 7 db0 h/l 8 db1 h/l 9 db2 h/l 10 db3 h/l 11 db4 h/l 12 db5 h/l 13 db6 h/l 14 db7 h/l d ata bits i n case of 4 bits instruction, data is transferred by twice using only 4 buses of d4 ? d7 ,and d0 ? d3 are not used , first operation is higher order 4 bits and second is lower 4 bits of 8 bits , but in cas e of 8 bits instruction , data is transferred by data by data bus of d0 ? d7 15 bla(+) 4.2v supply voltage for led - backlight 16 blk( - ) 0v supply voltage fo r led - backlight b) block diagram ir i/o b u f f e r lcd driving circuit p to s registor busy flag dr cg ram cg ram cursor and blink ckt. com driving circuit dd ram ac timing control circuit d e c o d e r rs r/w e d0-d3 d4-d7 vdd vo vss a. data register (dr): dris a register used for temporary storage of the data read/write form/into dd ram and cg ram. b. instruction register (ir): is a register available for storing the instruc tion codes and address information of display data (dd) ram and character generator (cg) ram. c. busy flag (bf): when the busy flag is ?1?,it shows that lcm is in internal operation and it can not accept the next instruction. d. character generator (cg) rom: thi s rom generates character pattern from 8 - bit character code and provides 192 character patterns. e. character generator (cg)ram: this ram allows the user to rewrite the character patterns freely according to the program. f. address counter (ac): this address cou nter is used to give the address information of dd ram and cg ram.
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 8 of 17 g. display data (dd) ram: this display data ram is used to store the display data expressed by 8 - bit character code . the capacity is 80x 8bits and data for 80 characters can be storage. h. curso r and blink control circuit: this circuit generates the cursor and blink. ram's address and the lcd's position shown bellows. display character address code: display p osition 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 00 01 02 03 04 05 06 07 0 8 09 0a 0b 0c 0d 0e 0f ddram address 40 41 42 43 44 45 46 47 48 49 4a 4b 4c 4d 4e 4f relationship between character code (ddram) and character pattern (cgram) character code dd ram data cg ram address character pattern cg ram data b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 b 5 b 4 b 3 b 2 b 1 b 0 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 0 0 0 1 1 1 1 1 0 0 1 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 0 0 1 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 0 0 1 0 0 0 0 0 0 x 0 0 0 0 0 0 1 1 1 x x x 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 0 0 1 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 0 1 1 1 0 0 0 0 0 x 0 0 1 0 0 1 1 1 1 x x x 0 0 0 0 0 1. } it means that the bit0~2 of the character code correspond to the bit3~5 of the cg ram address. 2. } these areas are not used for display, but can be used for the general data ram. 3. when all of the bit4 - 7 of the character code is 0, cg ram character pat terns are selected. 4. " 1 ": selected," 0 ": no selected," x": do not care (0 or 1). 5. for example (1), to set character code (b2 = b1 = b0 = 0, b3 = 0 or 1, b7 - b4 = 0) is to display" t". that means character code (00)16, and (08)16 can display" t? chara cter. 6. the bits 0 - 2 of the character code ram is character pattern line position. the 8th line is the cursor position and display is formed by logical or with the cursor
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 9 of 17 cgrom character code table: llll llll cg ram (1) upper 4bit lower 4bit lllh llhl llhh lhll lhlh lhhl lhhh hlll hllh hlhl hlhh hhll hhlh hhhl hhhh lllh (2) llhl (3) llhh (4) lhll (5) lhlh (6) lhhl (7) lhhh (8) hlll (1) hllh (2) hlhl (3) hlhh (4) hhll (5) hhlh (6) hhhl (7) hhhh (8)
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 10 of 17 c) instruct ion description control and display instructions will show in details as following: c.1) clear display rs r/w d7 d6 d 5 d4 d 3 d2 d1 d 0 0 0 0 0 0 0 0 0 0 1 it clears the whole display and sets display data ram's address 0 in address counter. c. 2) return home rs r/w d7 d6 d 5 d4 d 3 d2 d1 d 0 0 0 0 0 0 0 0 0 1 x x: do not care (0 or 1) it sets display data ram's address 0 in address counter and display returns to its original position. the cursor or blink goes to the left edge of the di splay (to the 1st line if 2 lines are displayed). the contents of the display data ram do not change. c.3) entry mode set during writing and reading data, it sets cursor move direction and shifts the display. rs r/w d7 d6 d 5 d 4 d 3 d2 d1 d 0 0 0 0 0 0 0 0 1 i/d s i / d = 1: increment, i / d = 0: decrement. s = 1: the display shift, s = 0: the display does not shift s= 1 i/d= 1 it shifts the display to the left s= 1 i/d=0 it shifts the display to the right c.4) display on/o ff control rs r/w d7 d6 d 5 d4 d 3 d2 d1 d 0 0 0 0 0 0 0 1 d c b d = 1: display on, d = 0: display off c = 1: cursor on , c = 0: cursor off b = 1: blinks on, b= 0: blinks off c.5) cursor or display shift without changing d d ram's daters, it can move cursor and shift display rs r/w d7 d6 d 5 d4 d 3 d2 d1 d 0 0 0 0 0 0 1 s/c r/l x x s/c r/l description address counter 0 0 shift cursor to the left ac = ac - 1 0 1 shift cursor to the right ac = ac + 1 1 0 shift display to the left. cursor follows the display shift ac=ac 1 1 shift display to the right. cursor follows the display shift ac=ac c. 6 ) function set rs r/w d7 d6 d 5 d4 d 3 d2 d1 d 0 0 0 0 0 1 dl n f x x x: do not care (0 or 1) dl: it sets interface data length. dl = 1: datas are transferred with 8 - bit lengths (db7 - 0).dl = 0: datas are transferred with 4 - bit lengths (db7 - 4). (it needs two times to transfer datas) n: it sets the number of the display line. n = 0: one - line display. n = 1: two - line display. f: it sets the character font. f = 0: 5 x 7 dots character font. f = 1: 5 x 10 dots character font. n f no. of display lines character font duty factor 0 0 1 5x7 dots 1 /8 0 1 1 5x 10 dots 1 /11 1 x 2 5x7 dots 1 /16
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 11 of 17 c.7) set character generator ram address rs r/w d7 d6 d 5 d4 d 3 d2 d1 d 0 0 0 0 1 a a a a a a it sets character generator ram address (aaaaaa) 2 to the address counter. character generator ram data can read or write a fter this setting. c.8) set display data ram address rs r/w d7 d6 d 5 d4 d 3 d2 d1 d 0 0 0 1 a a a a a a a it sets display data ram address (aaaaaaa) 2 to the address counter. display data ram can read or write after this setting. in one - line disp lay (n = 0), (aaaaaaa) 2 ; (oo) 16 - (4f) 16 in two - line display (n = 1), (aaaaaaa) 2 : (00) 16 - (27) 16 ,gfor the first line, (aaaaaaa) 2 : (40) 16 - (67) 16 ,gfor the second line. c. 9 ) read busy flag and address rs r/w d7 d6 d 5 d4 d 3 d2 d1 d 0 0 1 bf a a a a a a a when (bf = 1) indicates that the system is busy now, it will not accept any instruction until no busy (bf = 0). at the same time, the address counter content?s (aaaaaaa) 2 ; is read out. c. 10 ) write data to character generator ram or display data r am rs r/w d7 d6 d 5 d4 d 3 d2 d1 d 0 1 0 d d d d d d d d it writes data (dddddddd) 2 to character generator ram or display data ram. c. 11 ) read data from character generator ram or display data ram rs r/w d7 d6 d 5 d4 d 3 d2 d1 d 0 1 1 d d d d d d d d it reads data (dddddddd) 2 from character generator ram or display data ram. to get the correct data readout is shown below: ( ? ) set the address of the character generator ram or display data ram or shift the cursor instruction. (ii) send t he ?read ?instruction.
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 12 of 17 instruction table instruction code instruction rs rw d7 d6 d5 d4 d3 d2 d1 d 0 description execution time (fosc=270khz) clear display 0 0 0 0 0 0 0 0 0 1 write "20h" to ddram and set ddram a ddress to "ooh" from ac 1.52ms return home 0 0 0 0 0 0 0 0 1 - set ddram address to "ooh" from ac and return cursor to its original position if shifted. the contents of ddram are not changed. 1.52ms entry mode set 0 0 0 0 0 0 0 1 i/d s assign cursor m oving direction and enable the shift of entire display 38 us display on/ off 0 0 0 0 0 0 1 d c b set display(d), cursor(c), and blinking of cursor(b) on/off control bit. 38 us cursor or display shift 0 0 0 0 0 1 s/c r/l - - set cursor moving and display shift control bit, and the direction, without changing of ddram data. 38 us function set 0 0 0 0 1 dl n f - - set interface data length (dl: 8 - bit/4 - bit), numbers of display line (n: 2 - line/1 - line) and, display f ont type (f:5x10dots/5x8dots) 38 us set cgram address 0 0 0 1 ac5 ac4 ac3 ac2 ac1 aco set cgram address in address counter. 38 us set ddram address 0 0 1 ac6 ac5 ac4 ac3 ac2 ac1 aco set ddram address in counter 38 us read busy flag and address counter 0 1 bf ac6 ac5 ac4 ac3 ac2 ac1 aco whether during internal operation or not can be known by reading bf. the contents of address counter can also be read. 38 us write data to ram 1 0 d7 d6 d5 d4 d3 d2 d1 do write data i nto internal ram (ddram/cgram). 38 us read data from ram 1 1 d7 d6 d5 d4 d3 d2 d1 do read data from internal ram (ddram/cgram). 38 us
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 13 of 17 6. operating methods a) interface with mpu interface to z80 cpu /rd d0-d7 /irq 8 /wr a1-a7 a0 z80 7 mux r d lcm d0-d7 rw c q e rs a0 e /rd d0-d7 d0-d7 rw lcm rs mc6800 8 interface to mc6800 cpu e interface to mcs51 cpu /rd d0-d7 8 /wr a15 lcm d0-d7 rw e rs a14 mcs51
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 14 of 17 b) power supply gnd single supply voltage types v dd -v o :lcd driving voltage lcm v ss v dd -v o v o v dd 10k~20k v dd 5v 10k~20k vdd-vo:lcd driving voltage lcm vss vdd-v0 vo vdd +3v vee vdd dual supply voltage types c) operating example 8 - bit operation and 8 - digit 1 - line display (using internal reset) no instruction display operation 1 power on . ( splc780a 1 starts initializing ) power on reset. no display. function set rs r/w d7 d6 d5 d4 d3 d2 d1 d0 2 0 0 0 0 1 1 0 0 x x set to 8 - bit operation and select 1 - line display line and character font. display on / off control 3 0 0 0 0 0 0 1 1 1 0 _ display on. cursor appears. entry mode set 4 0 0 0 0 0 0 0 1 1 0 _ increase address by one. it will shift the cursor to the right when writing to the dd ram / cg ram. now the display has no shift. write data to cg ram / dd ram 5 1 0 0 1 0 1 0 1 1 1 w _ writ e ?w". the cursor is incremented by one and shifted to the right. write data to cg ram / dd ram 6 1 0 0 1 0 0 0 1 0 1 we _ write ?e ". the cursor is incremented by one and shifted to the right. 7 ??? ???? write data to cg ram / dd ram 8 1 0 0 1 0 0 0 1 0 1 welcome _ write ?e ". the cursor is incremented by one and shifted to the right. entry mode set 9 0 0 0 0 0 0 0 1 1 1 welcome _ set mode for display shift when writing write data to cg ram / dd ram 10 1 0 0 0 1 0 0 0 0 0 elcome _ write" "(space). the cursor is incremented by one and shifted to the right.
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 15 of 17 write data to cg ram / dd ram 11 1 0 0 1 0 0 0 0 1 1 lcome c write ?c ". the cursor is incremented by one and shifted to the right. 12 ????? ? ? write data to cg ram / dd ram 13 1 0 0 1 0 1 1 0 0 1 compamy write " y " . the cursor is incremented by one and shifted to the right. cursor or display shift 14 0 0 0 0 0 1 0 0 x x compam y only shift the cursor's position to the left (y). cursor or display shift 15 0 0 0 0 0 1 0 0 x x compamy only shift the cursor's position to the left (m). write data to cg ram / dd ram 16 1 0 0 1 0 0 1 1 1 0 ompany write ?n ". the display moves to the left. cursor or display shift 17 0 0 0 0 0 1 1 1 x x compan y shift the display and the cursor's position to the right. cursor or display shift 18 0 0 0 0 0 1 0 1 x x company shift the display and the cursor's position to the right. write data to cg ram / dd ram 19 1 0 0 1 0 0 0 0 0 0 ompany write " " (space). the cursor is incremented by one and shifted to the right. 20 ????? ? ? return home 21 0 0 0 0 0 0 0 0 1 0 welcome both the display and the cursor return to the original position (address 0). 4 - bit operation and 8 - digit 1 - line display (using internal reset) no . instruction display operation 1 power on . ( splc780a1 starts initializing ) power on reset. no display. f unction set rs r/w d7 d6 d5 d4 2 0 0 0 0 1 0 set to 4 - bit operation f unction set 0 0 0 0 1 0 3 0 0 0 0 x x set to 4 - bit operation and select 1 - line display line and character font. display on / off control 0 0 0 0 0 0 4 0 1 1 1 0 0 _ display on. cursor appears. entry mode set 0 0 0 0 0 0 5 0 0 1 1 0 0 _ increase address by one. it will shift the cursor to the right when writing to the dd ram / cg ram. now the display has no shift. write data to cg ram / dd ram 1 0 0 1 0 1 6 1 0 0 1 1 1 w_ write ?w ?. the cursor is incremented by one and shifted to the right.
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 16 of 17 power on r eset function a t power on, it starts the int ernal auto - reset circuit and executes the initial instructions . t here are the initial procedures shown as bellows: 8bits in terface waite time > 15ms afte r vdd>4.5v rs r/w d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 1 1 x x x x wait time > 4.1ms rs r/w d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 1 1 x x x x wait time > 100u s rs r/w d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 1 1 x x x x rs r/w d7 d6 d5 d 4 d3 d2 d1 d0 0 0 0 0 1 1 n f x x 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 i/d s bf cannot be checked before this instruction function set ( interface is 8 bits length). bf cannot be checked before this instruction function set ( interface is 8 bits length). bf cannot be checked before this instruction function set ( interface is 8 bits length). initialization end bf cannot be checked after the following i nstructions function set (interface is 8 bi ts length. specify t he number of display lines and character font . ) the number of display lines and character cannot be changed afterwards. d isplay off d isplay clear e ntry mode set
sc162 b ver2.1 akihabara inc. www.akiba-tech.com page 17 of 17 power on 4bits interface waite time > 15ms after vdd>4.5v rs r/w d7 d6 d5 d4 0 0 0 0 1 1 wait time > 4.1ms rs r/w d7 d6 d5 d4 0 0 0 0 1 1 wait time > 100u s rs r/w d7 d6 d5 d4 0 0 0 0 1 0 0 0 0 0 1 0 0 0 n f x x 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 i/d s initialization end bf cannot be checked before this instruction function set ( interface is 8 bits length). bf cannot be checked before this instruction function set ( interface is 8 bits length). rs r/w d7 d6 d5 d4 0 0 0 0 1 1 bf cannot be checked before this instruction function set ( interface is 8 bits length). bf cannot be checked after the follo wing i nstructions function set (set interface to be 4 bits length ) interface 8 bits length function set (interface is 8 bits length. specify t he number of display lines and character font. ) the number of display lines and character cannot be changed afterw ards. d isplay off d isplay clear e ntry mode set

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